The present invention relates in general to electronic test equipment, and in particular to an electronic memory module tester having an automatic feeder handler and alignment assembly.
Prior art test equipment includes automatic testers for testing electronic memory modules. The electronic memory modules have typically comprised circuit boards that have random access memory (RAM) integrated circuits mounted thereto. The circuit boards have been provided with surface contact pads that are typically aligned along one edge of the circuit board. This type edge connector configuration has been utilized for connecting the RAM integrated circuit components mounted to the circuit board to data buses of the devices within which the memory modules are used. Such memory modules have included SIMM, DIMM, and SODMM types of memory. Additionally, memory cards may also be utilized having the appearance of a credit card, and also having surface connectors mounted thereto for connecting the internally disposed memory thereof to equipment in which the aforementioned memory module is used.
Prior art in the technical field of the invention has encountered several important problems that negatively affect the accuracy and reliability of the test equipment. The invention described herein addresses these problems.
Test Accuracy. Electronic memory modules are typically tested after manufacturing to assure that they will perform properly after installation into a data processing system. Usually, a test connector is removably secured to edge connectors of the electronic memory modules under test to make contact to the surface pads for connecting the electronic memory modules to testing circuitry. In the prior art, automatic memory module test equipment included automatic memory module handlers. These prior art handlers typically utilized a conveyer belt for automatically feeding components through the test equipment. A stop was often utilized which was selectively retractable. The stop was selectively extended to stop the electronic memory module under test in a second position for engaging a connector to electrically connect the electronic memory module under test to the test equipment circuitry.
As is well known in the art, memory modules and the edge connectors therefor have been greatly reduced in size in recent years. The size of the connecter contact members has often been expressed in terms of the distance between corresponding points on adjacent ones of the surface contact pads of the electronic memory modules. Prior art contact pad spacing have been sized from 0.050 to 0.070 inches apart (50 mil to 70 mil). More recently, component spacing of 0.030 inches (30 mil) down to 0.025 inches (25 mil) have been utilized in fabricating electronic memory modules.
These recent reductions in the size of spacing between contact pads have reduced the ability of prior art handlers to adequately position the electronic memory modules edge surface contact pads for aligning with the test leads of the test connectors mounted to the handler equipment. This often results in test failures caused by misalignment between the test leads and the surface contact pads. Improvements for more closely aligning electronic memory modules under test with tester equipment connectors are desirable, such that alignment therebetween will be improved and the failure rate of electronic memory modules caused by inadequate testing procedures and equipment will be reduced.
Additionally, the testing of memory modules has become extremely sensitive to electrical current and testing signal irregularities. Prior art required adapters that are the actual testing contact with the memory testers. These prior art adapters produce current and testing signal irregularities that produce false or inaccurate testing results. Physically, the xe2x80x9cfingersxe2x80x9d are 1.5 inch long. A transition board also has to be made to adapt the signal source connection to the xe2x80x9cfingerxe2x80x9d connection. This complicates the electrical path by the addition of one connector transition and also the 1.5 inch length of the contactor. This addition works fine at a low frequency signal situation (under 50 Mhz) while it totally distorts the signal at high frequency. The term is call xe2x80x9cimpedance mis-mismatchxe2x80x9d. It essentially means that a normal signal goes through a not-so-smooth path and part of the signal is bounced back (echo) instead of getting through. The bounced back signal causes the original signal to have a xe2x80x9cdouble visionxe2x80x9d at the end of the path and render the signal un-recognizable.
The recent increases in sensitivity of memory modules to current and signal irregularities make it highly desirable to develop testing mechanisms and methodologies that minimize irregularities in current and signal.
Additionally, prior art handler equipment uses a retractable platform on which the module rests during the testing process. When testing is completed, the platform is retracted, allowing the module to drop into a mechanism that moves the module away from the testing position. The retractable platform in prior art requires constant adjustment because memory modules do not have a uniform thickness. Some modules have memory chips attached to only one side of the module board. Some modules have memory chips attached to both sides of the module board. Memory chips are also uneven in thickness. This uneven thickness of memory modules requires adjustment of the retractable platform. Misalignment of the platform can cause jams because the modules are then not in position for the testing process. Misalignment of the platform also causes test failures due to simple misalignment of the module in the memory tester. Additionally, repeated insertions of electronic memory modules into the testing interfaces of electronic memory module testers causes wear in the plastic edges of the interfaces. The wear of these edges results in improper alignment of electronic memory modules.
The recent developments in memory module design, as described previously, make it extremely important to develop a mechanism for the insertion of memory modules in the memory testers that prevent jams and misalignment.
The invention as described herein corrects the aforementioned technical problems in the field of electronic memory module testing. The invention aligns and positions electronic memory modules more precisely than prior art. The use of guides and rails in the invention prevent misalignment. The implementation of protective interface guides prevents misalignment resulting from repeated inserts of electronic memory modules.
Automation. Industries that utilize memory modules usually utilize memory modules in high quantities. Therefore, the testing of memory modules is a process that must test high quantities of memory modules. The automation of the memory module testing is essential to the profitable and efficient operation of businesses that use memory modules. The industry uses handler equipment to bring untested memory modules to the memory tester, insert the memory modules into the tester, and sort the tested memory modules.
Prior art handlers use stacking columns that hold vertically stacked memory modules. Prior art stacking columns were susceptible to uneven stacking by operators. Unevenly stacked modules would enter the testing process unevenly and in positions that would cause jams in the testing pathway. The possibility of these jams renders prior art unsuitable to be used in the absence of an operator. The invention described herein produces uniform and even stacks of electronic memory modules.
Prior art handlers sort memory modules by depositing the modules into bins or receptacles. This method of sorting causes the memory modules to fall into bins. The falling modules can be damaged. As a result of this damage, even modules that pass testing can be subsequently damaged in the sorting process. The invention described herein automatically stacks tested electronic memory modules and eliminates the problem described above.
Prior art handler equipment uses conveyor belts to move modules along the testing path. The modules can become misaligned on the conveyor belt and jam the handler. When this happens, prior art requires an operator to manually clear the conveyor path, reset the equipment and restart the testing process. The possibility of these jams renders prior art unsuitable to be used in the absence of an operator. The invention described herein automatically detects jams and clears object from conveyor belt transport systems without the need of human attention.
Prior art handler equipment uses conveyor belts with stops that protrude up from the surface of the conveyor belt. These stops are used to position the memory modules into testing position and to move the memory module along the testing path. In prior art, these stops frequently caused jams in the testing pathway poor positioning. If a memory module is placed on a stop, the module will become jammed along the testing pathway. This malfunction occurs because the handler does not have a means of positioning the stops in places that will avoid jamming the test pathway. The invention described herein detects the positions of stops to prevent positions that would cause jams.
The present invention disclosed and claimed herein horizontally inserts memory modules directly into the testing sockets of memory testers. This horizontal and direct insertion virtually eliminates problems of current irregularity, signal fluctuations, and memory module misalignment encountered by prior art.
The present invention disclosed and claimed herein utilizes retractable rails on which memory modules rest as they are inserted into the memory module tester. The retractable rails hold the memory module by the edges of the memory module. Holding the memory modules in such a way eliminates the problems encountered by prior art caused by the irregular thickness of memory chips. The retractable rails position all memory modules in proper alignment regardless of the thickness of the memory chips used on the memory module.
The present invention disclosed and claimed herein uses a carriage that holds a memory module in the proper alignment by using guide rods that fit into standard notches in memory module boards. The guide rods hold the memory module during insertion into the memory module tester and provides the hold necessary to remove the memory module from the tester apparatus.
The present invention disclosed and claimed herein comprises an apparatus that stacks memory modules evenly and in proper alignment for the testing process. This apparatus consists of a stacking tray similar in construction and design to prior art stacking trays. However, the present invention incorporates guide rods positioned in the stacking column that match standard notches found on all memory module boards. The rods, when properly fitted into these notches, produce an evenly stacked column of untested modules. The guide rods hold the memory modules in the proper alignment for insertion into the testing socket of memory module testers.
The present invention disclosed and claimed herein comprises a conveyor belt that has protruding stops, an infrared sensor, a microprocessor and a step motor. The protruding stops have a shape that obscures the infrared sensor when moved over the sensor. The sensor, when blocked by the stop, causes the microprocessor to calibrate the position of the stop. The microprocessor then causes the step motor to move the stop to the proper position so that the stop will not cause jams in the testing pathway.
The present invention disclosed and claimed herein uses the stop blocks to clear the conveyor belt pathway by moving the stop blocks along the conveyor belt pathway in both directions.
The present invention disclosed and claimed herein comprises an output stacker that receives tested modules and automatically stacks the modules for delivery. The tested module is moved to the stacker and slides onto a platform. The module is moved into the proper stacking position by a vertical rod. The platform is moved up to the bottom of a module stacker column. The bottom of the module stacker column has a mechanism that secures the memory module to the bottom of the stack